# ASF Sensor Hub - Cursor Configuration

## Project Context

**Project Name:** ASF Sensor Hub (Sub-Hub)  
**Target Platform:** ESP32-S3 microcontroller  
**Framework:** ESP-IDF v5.4  
**RTOS:** FreeRTOS (included in ESP-IDF)  
**Language:** C/C++  
**Domain:** Industrial / Agricultural Automation (Smart Poultry Farm)

## Global Conditions

### Hardware Platform
- **MCU:** ESP32-S3
- **CPU:** Dual-core Xtensa LX7, 240 MHz
- **Memory:** 512KB SRAM, 8MB Flash
- **Security:** Secure Boot V2, Flash Encryption (AES-256), eFuse
- **Connectivity:** Wi-Fi 802.11n (2.4 GHz), ESP-NOW, Bluetooth (optional)

### Software Framework
- **Framework:** ESP-IDF v5.4
- **RTOS:** FreeRTOS
- **Language:** C/C++ (C++17 standard)
- **Build System:** CMake
- **Toolchain:** ESP-IDF toolchain

### Communication Stack
- **Physical/Link:** Wi-Fi 802.11n (2.4 GHz)
- **Application Protocol:** MQTT over TLS 1.2
- **Peer-to-Peer:** ESP-NOW
- **Payload Encoding:** CBOR (Binary, versioned)
- **Security:** Mutual TLS (mTLS) with X.509 certificates

### Security Requirements
- **Secure Boot:** Secure Boot V2 (mandatory for production)
- **Flash Encryption:** AES-256 (hardware-accelerated)
- **Communication:** TLS 1.2 with mutual authentication (mTLS)
- **Key Storage:** eFuse or encrypted flash
- **Anti-Rollback:** eFuse-based version protection

### Storage
- **Primary Storage:** SD Card (FAT32, SDMMC 4-bit)
- **Configuration Storage:** NVS (Encrypted, 64KB)
- **Firmware Storage:** Flash partitions (A/B partitioning: ota_0, ota_1)

### System Architecture
- **Architecture Style:** Layered, Event-Driven, Component-Based
- **State Management:** Finite State Machine (11 states)
- **Communication:** Event-driven publish/subscribe
- **Persistence:** DP (Data Persistence) component abstraction

### Development Constraints
- **No Direct Hardware Access:** Application layer must use abstraction layers
- **State-Aware Execution:** All features must respect system state
- **Non-Blocking Operations:** Critical paths must be non-blocking
- **Deterministic Behavior:** Time-critical tasks must have bounded execution time
- **Memory Management:** Minimal dynamic allocation in critical paths

### Standards Compliance
- **Requirements:** ISO/IEC/IEEE 29148 (SRS)
- **Industrial Standards:** IEC 61499 (conceptual), ISA-95 (conceptual)
- **Security:** Industry-standard secure boot and encryption

### Key Documents
- **Features:** `Features.md` and `[XXX] Feature Files.md`
- **State Machine:** `System_State_Machine_Specification.md`
- **Failure Handling:** `Failure_Handling_Model.md`
- **SRS:** `System Design/SRS/SRS.md`
- **Architecture:** `software design/components/ARCHITECTURE.md`
- **Component Specs:** `software design/components/.../COMPONENT_SPEC.md`

### Important Notes
- This is an **industrial embedded system**, not consumer IoT
- **Reliability > Convenience**
- **Security is mandatory**
- **OTA must be fail-safe**
- **Power loss is expected** (brownout detection required)
- **SD card failure must be assumed** (fallback mode required)

### Development Guidelines
- Follow **Cross-Feature Constraints** (`Cross-Feature Constraints.md`)
- Respect **System State Machine** (`System_State_Machine_Specification.md`)
- Implement **Failure Handling Model** (`Failure_Handling_Model.md`)
- Use **Component Specifications** for API definitions
- Maintain **Traceability** to System Requirements (SR-*) and Software Requirements (SWR-*)

### Testing Requirements
- **Unit Tests:** Required for all components
- **Integration Tests:** Required for feature interactions
- **HIL/System Tests:** Required for system-level validation
- **V&V Matrix:** `System Design/SRS/VV_Matrix.md` defines verification methods

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**Use this context when generating code, documentation, or making architectural decisions.**